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Date: Fri, 9 Aug 2013 00:04:12 +0400
From: Solar Designer <>
Subject: Re: FPGA reprogramming on ZedBoard / Parallella board

On Thu, Aug 08, 2013 at 09:49:12PM +0200, Katja Malvoni wrote:
> I've just found this thread -
> "promgen -b -w -p bin -data_width 32 -u 0 system_stub.bit -o
> system_stub.bit.bin" is suggested as more reliable.
> parallella16_prototype.bin is created using bootgen and

This file wasn't the correct size (or at least not the same size as the
original bitstream), so I did not try loading it yet.

> parallella16_prototype.bit.bin is created using promgen.

I tried loading this one, and it's a partial success: although I lost
the ability to interact with the board via Ethernet (so I've
power-cycled it to recover), the counter pattern on the LEDs was reset
to all 1's and continued working from there.  So I know the new
bitstream was loaded and wasn't totally unreasonable. ;-)

How would you like to troubleshoot this further?  If necessary, I can
connect a serial console and see what happens there, but I doubt it'd be
of any help.


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