Date: Thu, 8 Aug 2013 21:49:12 +0200 From: Katja Malvoni <kmalvoni@...il.com> To: john-dev@...ts.openwall.com Subject: Re: FPGA reprogramming on ZedBoard / Parallella board On Thu, Aug 8, 2013 at 9:28 PM, Solar Designer <solar@...nwall.com> wrote: > On Tue, Aug 06, 2013 at 08:40:19PM +0200, Katja Malvoni wrote: > > I created bitstream but I'm not sure whether I generated .bin file from > it > > correctly. I wanted to check before replacing bitstream on board because > > this task is not urgent and if I did it wrong, board won't be available > for > > others. > > Can you upload the bitstream (the .bin file) for me to try loading? > Then if the system fails, I'll power-cycle it right away, so the > downtime will be minimal. > I've just found this thread - http://forums.xilinx.com/t5/Embedded-Linux/Zynq-Loading-bitfile-into-FPGA-from-Linux-xdevcfg/td-p/237850and "promgen -b -w -p bin -data_width 32 -u 0 system_stub.bit -o system_stub.bit.bin" is suggested as more reliable. parallella16_prototype.bin is created using bootgen and parallella16_prototype.bit.bin is created using promgen. Files are in /home/kmalvoni/bitstreams Katja Content of type "text/html" skipped
Powered by blists - more mailing lists
Confused about mailing lists and their use? Read about mailing lists on Wikipedia and check out these guidelines on proper formatting of your messages.