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Date: Thu, 24 Jun 2021 20:47:05 +0800
From: 罗勇刚(Yonggang Luo) <>
To: Musl <>
Subject: Re: Re: Re: Port the new architecture loongarch64 to musl

Hi, you can enable cirrus so the CI can be triggered
Also the system emulation didn't support yet:)
Which BIOS would  loongarch64 using? The OpenBIOS?

On Thu, Jun 24, 2021 at 8:18 PM 翟小娟 <> wrote:
> Hi,
> Qemu Loongarch64 related code can be viewed (Add loongarch linux-user emulation
> -----原始邮件-----
> 发件人:"罗勇刚(Yonggang Luo)" <>
> 发送时间:2021-06-24 19:56:17 (星期四)
> 收件人: Musl <>
> 抄送:
> 主题: Re: Re: [musl] Port the new architecture loongarch64 to musl
> On Thu, Jun 24, 2021 at 7:43 PM 翟小娟 <> wrote:
> &gt;
> &gt; Hi, qemu supports loongarch64 architecture has been completed: .
> Good to hear that, which qemu branches support for loongarch64?
> &gt; For musl loongarch64 source code can also be obtained from If necessary, we can also
provide a remote testing enviroment.
> &gt; See the attachment for specific modifications.
> &gt;
> &gt; -----原始邮件-----
> &gt; 发件人:"罗勇刚(Yonggang Luo)" <>
> &gt; 发送时间:2021-05-08 00:29:40 (星期六)
> &gt; 收件人: Musl <>
> &gt; 抄送: "陈国祺" <>
> &gt; 主题: Re: [musl] Port the new architecture loongarch64 to musl
> &gt;
> &gt; Same question, does qemu have already support for  loongarch64,
that's means a lot for auto testing
> &gt; As the real hardware will be not broadly  available in the next few
> &gt;
> &gt;
> &gt;
> &gt; On Fri, May 7, 2021 at 5:01 PM 翟小娟 <> wrote:
> &gt; Hi,
> &gt; I ported a new architecture loongarch64 on the latest branch of musl
master. It has been successfully compiled and run the official test
libraries libc-testsuit and libc-test of musl.
> &gt; The source code of the prot has been published in  Or check the attachment
0001-port-to-loongarch64.patch, it is the transplanted patch file.
> &gt;
> &gt; Introduction to loongarch architecture:
> &gt; The Loongarch architecture is a simplified instruction computer
style instruction system architecture. The instruction length is fixed and
the encoding format is regular. Most instructions have only two source
operands and one destination operand. The load/store architecture is
adopted, that is, only load/store memory access instructions can access the
memory, and the operation objects of other instructions are all It is the
immediate value in the register or instruction code in the processor core.
> &gt; The Loongson architecture is divided into two versions, 32bit and
64bit, called LA32 and LA64 respectively. LA64 architecture application
level is downward binary compatible with LA32 architecture.
> &gt;
> &gt;
> &gt;
> &gt; --
> &gt; 此致
> &gt; 礼
> &gt; 罗勇刚
> &gt; Yours
> &gt; sincerely,
> &gt; Yonggang Luo
> &gt;
> &gt;
> &gt; </></></></>
> --
> 此致
> 礼
> 罗勇刚
> Yours
> sincerely,
> Yonggang Luo
> </></></>

Yonggang Luo

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