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Date: Thu, 16 Jan 2020 18:24:15 +0000
From: Will Deacon <will@...nel.org>
To: Sami Tolvanen <samitolvanen@...gle.com>
Cc: Catalin Marinas <catalin.marinas@....com>,
Steven Rostedt <rostedt@...dmis.org>,
Masami Hiramatsu <mhiramat@...nel.org>,
Ard Biesheuvel <ard.biesheuvel@...aro.org>,
Mark Rutland <mark.rutland@....com>,
Dave Martin <Dave.Martin@....com>,
Kees Cook <keescook@...omium.org>,
Laura Abbott <labbott@...hat.com>, Marc Zyngier <maz@...nel.org>,
Nick Desaulniers <ndesaulniers@...gle.com>,
Jann Horn <jannh@...gle.com>,
Miguel Ojeda <miguel.ojeda.sandonis@...il.com>,
Masahiro Yamada <yamada.masahiro@...ionext.com>,
clang-built-linux@...glegroups.com,
kernel-hardening@...ts.openwall.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v6 14/15] arm64: implement Shadow Call Stack
On Fri, Dec 06, 2019 at 02:13:50PM -0800, Sami Tolvanen wrote:
> This change implements shadow stack switching, initial SCS set-up,
> and interrupt shadow stacks for arm64.
>
> Signed-off-by: Sami Tolvanen <samitolvanen@...gle.com>
> Reviewed-by: Kees Cook <keescook@...omium.org>
> ---
> arch/arm64/Kconfig | 5 ++++
> arch/arm64/include/asm/scs.h | 37 +++++++++++++++++++++++++
> arch/arm64/include/asm/thread_info.h | 3 +++
> arch/arm64/kernel/Makefile | 1 +
> arch/arm64/kernel/asm-offsets.c | 3 +++
> arch/arm64/kernel/entry.S | 31 +++++++++++++++++++--
> arch/arm64/kernel/head.S | 9 +++++++
> arch/arm64/kernel/irq.c | 2 ++
> arch/arm64/kernel/process.c | 2 ++
> arch/arm64/kernel/scs.c | 40 ++++++++++++++++++++++++++++
> arch/arm64/kernel/smp.c | 4 +++
> 11 files changed, 135 insertions(+), 2 deletions(-)
> create mode 100644 arch/arm64/include/asm/scs.h
> create mode 100644 arch/arm64/kernel/scs.c
[...]
> diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
> index 583f71abbe98..7aa2d366b2df 100644
> --- a/arch/arm64/kernel/entry.S
> +++ b/arch/arm64/kernel/entry.S
> @@ -172,6 +172,10 @@ alternative_cb_end
>
> apply_ssbd 1, x22, x23
>
> +#ifdef CONFIG_SHADOW_CALL_STACK
> + ldr x18, [tsk, #TSK_TI_SCS] // Restore shadow call stack
> + str xzr, [tsk, #TSK_TI_SCS] // Limit visibility of saved SCS
> +#endif
> .else
> add x21, sp, #S_FRAME_SIZE
> get_current_task tsk
> @@ -280,6 +284,12 @@ alternative_else_nop_endif
> ct_user_enter
> .endif
>
> +#ifdef CONFIG_SHADOW_CALL_STACK
> + .if \el == 0
> + str x18, [tsk, #TSK_TI_SCS] // Save shadow call stack
> + .endif
> +#endif
> +
> #ifdef CONFIG_ARM64_SW_TTBR0_PAN
> /*
> * Restore access to TTBR0_EL1. If returning to EL0, no need for SPSR
> @@ -385,6 +395,9 @@ alternative_insn eret, nop, ARM64_UNMAP_KERNEL_AT_EL0
>
> .macro irq_stack_entry
> mov x19, sp // preserve the original sp
> +#ifdef CONFIG_SHADOW_CALL_STACK
> + mov x20, x18 // preserve the original shadow stack
> +#endif
Hmm, not sure about corrupting x20 here. Doesn't it hold the PMR value from
kernel_entry?
Rest of the patch looks ok, but I'll do a proper review when it's closer to
being merged as we've got a bunch of other entry changes in the pipeline.
Will
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