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Message-ID: <20191220160537.GE1397@zn.tnic>
Date: Fri, 20 Dec 2019 17:05:37 +0100
From: Borislav Petkov <bp@...en8.de>
To: Thomas Garnier <thgarnie@...omium.org>
Cc: Peter Zijlstra <peterz@...radead.org>,
Kernel Hardening <kernel-hardening@...ts.openwall.com>,
Kristen Carlson Accardi <kristen@...ux.intel.com>,
Kees Cook <keescook@...omium.org>,
Andy Lutomirski <luto@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, "H. Peter Anvin" <hpa@...or.com>,
the arch/x86 maintainers <x86@...nel.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v10 04/11] x86/entry/64: Adapt assembly for PIE support
On Fri, Dec 06, 2019 at 08:35:09AM -0800, Thomas Garnier wrote:
> > Yes, but there it made sense since the PUSH actually created that field
> > of the frame, here it is nonsensical. What this instruction does is put
> > the address of the '1f' label into RDX, which is then stuck into the
> > (R)IP field on the next instruction.
>
> Got it, make sense. Thanks.
>
> >
> > > > > + movq %rdx, 8(%rsp) /* Put 1f on return address */
And pls write it out as "put the address of the '1f' label into RDX"
instead of "Put 1f on return address" which could be misunderstood.
Thx.
--
Regards/Gruss,
Boris.
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