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Date: Fri, 9 Aug 2013 15:45:49 +0200
From: Katja Malvoni <>
Subject: Re: FPGA reprogramming on ZedBoard / Parallella board

On Fri, Aug 9, 2013 at 2:02 PM, Sylvain Munaut <> wrote:

> Hi,
> > The problem we're having is that the bitstream Katja generated using
> > (I think) the guide you mentioned results in non-working Ethernet
> > (at least).
> Is that on a gigabit hub ? Or 10/100 ?
> When rebuilding the kernel/device tree/fsbl, the device tree has some
> issue with the PHY init that makes it work in gigabit mode only.
> See

But this is for rebuilding fsbl, shouldn't Ethernet be intact when
generating and replacing bitstream?


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