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Date: Fri, 9 Aug 2013 12:45:45 +0400
From: Solar Designer <>
Subject: Re: ZedBoard / Parallella: bcrypt


On Fri, Aug 09, 2013 at 02:10:42AM +0200, Katja Malvoni wrote:
> Because of that I plan to do bcrypt implementation in following steps:
>  - get working simulation of sbox transfers to and from custom peripheral
> (in this case custom peripheral will just store sbox) (in case I won't be
> able to do BFM simulation I'll skip this step)
>  - implement those transfers between ARM core and FPGA on Parallella board
>  - implement bcrypt's most costly loop as separate IP block and test it in
> ISim (without communication, just logic)
>  - when I get working simulation test IP block with AXI BFM
>  - merge with Parallella prototype
> Does this sound reasonable?

It does, although I'm not familiar with the simulation tools involved.

We also still have the task of getting a regenerated bitstream working
right on ZedBoard / Parallella board - with no new features, but also
not breaking any of the existing functionality, right?  Is this also
(still) on your priorities list (just not exactly a bcrypt topic, so not
mentioned in this specific posting of yours)?


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