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Message-ID: <20261004030453.GF23438@brightrain.aerifal.cx>
Date: Sat, 3 Oct 2026 23:04:53 -0400
From: Rich Felker <dalias@...c.org>
To: Alex Rønne Petersen <alex@...xrp.com>
Cc: musl@...ts.openwall.com
Subject: Re: [PATCH] riscv: declare all vector registers as clobbers
of syscalls
On Sun, Oct 04, 2026 at 04:48:52AM +0200, Alex Rønne Petersen wrote:
> The kernel intentionally clobbers vector registers (by setting them to all 1s).
> musl didn't declare this, so with a compiler targeting the V extension, this
> could lead to all sorts of breakage that at first glance looks like
> miscompilations.
> ---
> arch/riscv32/syscall_arch.h | 9 ++++++++-
> arch/riscv64/syscall_arch.h | 9 ++++++++-
> 2 files changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/arch/riscv32/syscall_arch.h b/arch/riscv32/syscall_arch.h
> index 70d2773f..9149cb9e 100644
> --- a/arch/riscv32/syscall_arch.h
> +++ b/arch/riscv32/syscall_arch.h
> @@ -3,9 +3,16 @@
> ((union { long long ll; long l[2]; }){ .ll = x }).l[1]
> #define __SYSCALL_LL_O(x) __SYSCALL_LL_E((x))
>
> +#define SYSCALL_CLOBBERLIST \
> + "v0" , "v1", "v2", "v3", "v4", "v5", "v6", "v7", \
> + "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", \
> + "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", \
> + "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", \
> + "vl", "vtype", "vxsat", "vxrm", "memory"
> +
> #define __asm_syscall(...) \
> __asm__ __volatile__ ("ecall\n\t" \
> - : "=r"(a0) : __VA_ARGS__ : "memory"); \
> + : "=r"(a0) : __VA_ARGS__ : SYSCALL_CLOBBERLIST); \
> return a0; \
>
> static inline long __syscall0(long n)
> diff --git a/arch/riscv64/syscall_arch.h b/arch/riscv64/syscall_arch.h
> index 81993fc8..6e05c9b3 100644
> --- a/arch/riscv64/syscall_arch.h
> +++ b/arch/riscv64/syscall_arch.h
> @@ -1,9 +1,16 @@
> #define __SYSCALL_LL_E(x) (x)
> #define __SYSCALL_LL_O(x) (x)
>
> +#define SYSCALL_CLOBBERLIST \
> + "v0" , "v1", "v2", "v3", "v4", "v5", "v6", "v7", \
> + "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15", \
> + "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23", \
> + "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31", \
> + "vl", "vtype", "vxsat", "vxrm", "memory"
> +
> #define __asm_syscall(...) \
> __asm__ __volatile__ ("ecall\n\t" \
> - : "=r"(a0) : __VA_ARGS__ : "memory"); \
> + : "=r"(a0) : __VA_ARGS__ : SYSCALL_CLOBBERLIST); \
> return a0; \
>
> static inline long __syscall0(long n)
> --
> 2.53.0
I don't doubt that something like this is needed, but I'm a little
concerned about a couple things. Does this break build for targets that
lack these registers or compilers that aren't aware of them? And is
the set stable, or will it grow as other extensions are added?
If there are no good answers to these questions, it might require
dropping inline syscalls for riscv and forcing them all to go through
an external call where the call ABI governs the register clobbers.
Rich
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