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Message-ID: <aNVgMkWvRzf3kWSt@pie>
Date: Thu, 25 Sep 2025 15:30:58 +0000
From: Yao Zi <ziyao@...root.org>
To: musl@...ts.openwall.com
Cc: pincheng.plct@...c.iscas.ac.cn
Subject: Re: [PATCH 1/1] riscv64: optimize memset implementation with
vector extension
On Thu, Sep 25, 2025 at 09:15:57PM +0800, Pincheng Wang wrote:
> Use head-tail filling strategy for small sizes and dynamic vsetvli
> approach for vector loops to reduce branch overhead. Add conditional
> compilation to fall back to scalar implementation when __riscv_vector is
> not available.
>
> Signed-off-by: Pincheng Wang <pincheng.plct@...c.iscas.ac.cn>
> ---
> src/string/riscv64/memset.S | 101 ++++++++++++++++++++++++++++++++++++
> 1 file changed, 101 insertions(+)
> create mode 100644 src/string/riscv64/memset.S
>
> diff --git a/src/string/riscv64/memset.S b/src/string/riscv64/memset.S
> new file mode 100644
> index 00000000..5fc6ee14
> --- /dev/null
> +++ b/src/string/riscv64/memset.S
> @@ -0,0 +1,101 @@
> +#ifdef __riscv_vector
I don't think musl is built with V extension specified in march on
RISC-V platforms by default. Does this patch only benefit builds that
"-march=rv64gcv" is manually specified in CFLAGS?
Furthermore, having RVV available at compilation-time doesn't mean it's
available at runtime. This effectively raises the baseline for RISC-V
platforms from RV64GC (or even lower) to RV64GCV, where the latter isn't
implied by the mostly-adapted RVA20 profile.
Best regards,
Yao Zi
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