Follow @Openwall on Twitter for new release announcements and other news
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Fri, 24 Jan 2020 19:11:00 -0500
From: Rich Felker <>
Subject: Re: Considering x86-64 fenv.s to C

On Sat, Jan 25, 2020 at 10:59:07AM +1100, Damian McGuckin wrote:
> Is MUSL ever likely to support Sparc64?
> If so, there is tweak needed for the rounding to match the API. For
> some reason, what is returned to a user program query is just a
> right shifted version of what is in the register, with an equivalent
> left shift for when the mode is set. Very odd.
> The default shift for everything else would be 0.

Unless the bits are in the high portion of the register, we can just
define the FE_* constants to match their location in the register.
Otherwise defining a shift, zero by default, is not a big deal. I
wouldn't worry about this now. It's not like a shift is hard to add
later if needed; it doesn't invalidate the proposed design.


Powered by blists - more mailing lists

Confused about mailing lists and their use? Read about mailing lists on Wikipedia and check out these guidelines on proper formatting of your messages.