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Date: Wed, 27 Feb 2019 22:03:40 +0100
From: Szabolcs Nagy <nsz@...t70.net>
To: musl@...ts.openwall.com
Subject: Re: FE Exception triggered by comparison
* Rich Felker <dalias@...c.org> [2019-02-27 15:35:03 -0500]:
> On Wed, Feb 27, 2019 at 09:16:09PM +0100, Szabolcs Nagy wrote:
> > * Alexander Monakov <amonakov@...ras.ru> [2019-02-27 22:48:02 +0300]:
> > > On Wed, 27 Feb 2019, Rich Felker wrote:
> > > > Ideally the compiler would be able to recognize portable (within IEEE)
> > > > patterns for floating point representation examination and optimize
> > > > them if there's a more efficient way to be able to do it for a
> > > > particular machine.
> > >
> > > There's a difference for sNaN operands: the bit-test version obviously
> > > is not going to raise "invalid", while comparing the fpu register with
> > > itself will. So I'm afraid the compiler wouldn't do that for x86 (but
> > > could for targets where an suitable instruction is available).
> >
> > using -fsignaling-nan is extremely rare, by default the transformation
> > is valid (but maybe tricky anyway).
>
> I'm not sure if I'd call transforming non-floating-point
> bit-manipulation code into a floating point instruction that alters
> exception flags "valid" regardless of the -fsignaling-nan state. It's
> one thing to say "this program isn't using and doesn't care about
> signaling nans [as floating point values]"; it's completely different
> to say "you can optimize integer operations as floating point without
> regard for how that affects fenv".
ok i assumed gcc would also detect that the source of those bits
are from an fp value, but that may be too much to ask (and may
still have the same safety issue if the fp value is not from
normal fp computations).
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