Date: Thu, 13 Sep 2018 11:39:25 -0400 From: Rich Felker <dalias@...c.org> To: musl@...ts.openwall.com Subject: Re: Cortex-M support / single float On Thu, Sep 13, 2018 at 12:30:45PM +0100, Jon Chesterfield wrote: > > note that a large part of the float code in libc is in the > > math library which expects efficient double arithmetics, > > i plan to rewrite the most important single precision math > > functions using double arithmetics, this gives significant > > benefits on all systems except ones with single precision > > only hw. > > I'm responsible for libm on an architecture with 32bit float in hardware > and 64bit float via integer ops. It's derived from musl because I like musl. > > Currently operations written in terms of double are rather slow. Would > upstream accept functions optimised for a 32bit float+int system? I haven't > written them yet but it's on the todo list. If implementations with float+int can be reasonably trusted to give comparable precision (and of course exact results for the functions specified to be exact), I don't see a reason not to accept them. How are exception flags handed on such archs? Are the double operations expected to set the flags in the single-precision fpu correctly? Or does it just have to be treated as a no-fenv arch? Rich
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