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Date: Tue, 27 Feb 2018 17:26:13 -0800
From: Andre McCurdy <armccurdy@...il.com>
To: musl@...ts.openwall.com
Subject: Re: clz instruction is unavailable for Thumb1

On Tue, Feb 27, 2018 at 5:01 PM, Rich Felker <dalias@...c.org> wrote:
> On Tue, Feb 27, 2018 at 04:37:15PM -0800, Andre McCurdy wrote:
>> On Tue, Feb 27, 2018 at 4:03 PM, Zhao, Weiming <weimingz@...eaurora.org> wrote:
>> > In arch/arm/atomic_arch.h, it checks for __ARM_ARCH >= 5, which is not
>> > sufficient.
>> >
>> > for example, for armv6-m, it only support Thumb1, which doesn't include clz.
>> >
>> > Suggest to check if it's building for thumb1:
>>
>> Musl does not currently support Thumb 1.
>
> I forget what the situation with v6-m is, and whether/how it could be
> supportable. Is it really thumb1 or some thumb2 subset that fills
> deficiencies?

It's Thumb1 plus BL, DMB, DSB, ISB, MRS and MSR from Thumb2.

> My recollection was that thumb1 lacks atomics, barriers,
> thread-pointer loading, and maybe even syscalls, and since the
> kuser_helper addresses are arm addresses, you can't even use them to
> get the missing functionality.
>
> Rich
>
>
>> > diff --git a/arch/arm/atomic_arch.h b/arch/arm/atomic_arch.h
>> > index c5c56f8..e3cb66a 100644
>> > --- a/arch/arm/atomic_arch.h
>> > +++ b/arch/arm/atomic_arch.h
>> > @@ -82,7 +82,7 @@ static inline void a_crash()
>> >                 : : : "memory");
>> >  }
>> >
>> > -#if __ARM_ARCH >= 5
>> > +#if __ARM_ARCH >= 5 && !(defined(__thumb__) && !defined(__thumb2))
>> >
>> >
>> >
>> > --
>> > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by
>> > The Linux Foundation
>> >

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