Date: Wed, 22 Jun 2016 13:37:38 -0700 From: "Zhao, Weiming" <weimingz@...eaurora.org> To: musl@...ts.openwall.com Subject: Re: build musl for armv7m How about using the following test? !defined(__thumb__) || (__ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH > 7) Because I think those instructions are ISA related, not just arm/thumb. For example, using -mcpu=cortex-a8 -mthumb, the original code still works. So if only testing __thumb__, the armv7-a thumb mode will fall into the slow path too. On 6/22/2016 12:19 PM, Rich Felker wrote: > On Wed, Jun 22, 2016 at 12:08:13PM -0700, Zhao, Weiming wrote: >> Thanks for reviewing. >> >> I add tests for ARMv7m for memcpy. >> >> For atomics.s, I think the below are equivalent: >> >> ldr ip,1f ==> assembler will computes the offset from current inst to the label >> >> - ldr ip,[pc,ip] ==> here the address to be loaded is current PC + ip >> + add ip,pc,ip ==> here, the PC is the same as above >> + ldr ip,[ip] > In the original code, pc reads as the address of the instruction > following the ".word" mnemonic (2 ARM insns ahead of the current > instruction). In your version, I believe pc reads as the address of > the .word (2 thumb insns ahead of the current insn) which would be > wrong, but I may be wrong; one source I saw suggested that arithmetic > on pc like this was not even defined in thumb mode on some models. > >> But I'm not familiar with the CP15 issue you mentioned. >> So, anyway, I skip the change for atomics.s in this patch. > OK. But just know that you can't expect it to work unless that's > implemented. >> diff --git a/src/string/arm/memcpy_le.S b/src/string/arm/memcpy_le.S >> index 4db4844..1137f55 100644 >> --- a/src/string/arm/memcpy_le.S >> +++ b/src/string/arm/memcpy_le.S >> @@ -241,7 +241,12 @@ non_congruent: >> beq 2f >> ldr r5, [r1], #4 >> sub r2, r2, #4 >> +#if (__ARM_ARCH_7A || __ARM_ARCH_7R || __ARM_ARCH > 7) >> orr r4, r3, r5, lsl lr >> +#else >> + lsl r4, r5, lr >> + orr r4, r3, r4 >> +#endif > These are not the right conditions. The selection should be made based > on whether the code is being assembled as thumb, not on the ISA > revision level. As written your patch uses the thumb code on all > pre-v7 targets. > Rich -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation View attachment "patch.diff" of type "text/plain" (1601 bytes)
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