Date: Sun, 13 Mar 2016 22:13:57 -0400 From: Rich Felker <dalias@...c.org> To: musl@...ts.openwall.com Subject: Re: musl without atomic instructions? On Mon, Mar 14, 2016 at 10:34:22AM +0900, Masanori Ogino wrote: > 2016-03-13 9:54 GMT+09:00 Masanori Ogino <masanori.ogino@...il.com>: > > 2016-03-13 9:21 GMT+09:00 Rich Felker <dalias@...c.org>: > >> Minimal profiles for microcontroller use lack it (this was a > >> mistake in the riscv ISA specification, IMO), so if supporting these > >> ISA levels is interesting, there are at least three options: > >> > >> 1. Have the kernel trap the unimplemented instructions and emulate > >> them. > >> > >> 2. Have userspace issue a system call to have the kernel mediate > >> atomic accesses. > >> > >> 3. Integrate atomic sequence restart with the scheduler: at scheduling > >> time, the kernel determines if the task being resumed was > >> interrupted in the middle of a sequence of instructions that's > >> supposed to be atomic, and if so, resets the program counter to the > >> beginning of the sequence. (This is how pre-v6 ARM and most SH > >> models work.) > >> > >> Option 3 offers by far the best performance but inherently only works > >> on uniprocessor. Options 1 and 2 could theoretically support SMP as > >> long as the kernel has some other way of ensuring mutual exclusion and > >> memory synchronization between the processors. > >> > >> Of course the best of all worlds is to have the kernel provide a vdso > >> function for atomic cas which it can then provide an optimal > >> implementation of for the particular processor being used. Then > >> baseline-ISA-level riscv binaries would use the vdso, and ones > >> targeting an ISA level that's known to have native atomic instructions > >> would use the inline instructions. > > > > OK, I will ask about the current status on the RISC-V sw-dev ML. > > On sw-dev, Darius Rad taught me that there is a syscall to perform CAS > on RISC-V without the A standard extension. CONFIG_RV_SYSRISCV_ATOMIC > enables it (with RISC-V patches.) > > For reference, the source code is here: > https://github.com/riscv/riscv-linux/blob/master/arch/riscv/kernel/sys_riscv.c IMO a vdso function should be added that makes the syscall, rather than having libc call the syscall directly; this would allow the kernel to automatically provide a better implementation in the future without the need to rebuild applications. Using a syscall for this is very slow. Working with kernel people to propose such a thing (or even implementing it and submitting kernel patches) is certainly one option for something to add to a GSoC project proposal to make it more substantial. Rich
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