Date: Sun, 6 Mar 2016 17:09:53 -0500 From: Rich Felker <dalias@...c.org> To: musl@...ts.openwall.com Subject: Re: [PATCH v3] Add PowerPC soft-float support On Mon, Jan 25, 2016 at 12:12:35PM -0500, Rich Felker wrote: > On Mon, Jan 25, 2016 at 01:20:52PM +0100, Felix Fietkau wrote: > > Some PowerPC CPUs (e.g. Freescale MPC85xx) have a completely different > > instruction set for floating point operations (SPE). > > Executing regular PowerPC floating point instructions results in > > "Illegal instruction" errors. > > > > Make it possible to run these devices in soft-float mode. > > If their fpu is ieee conforming (this is probably a big if) it should > be possible for them to run in hard-float mode too, but the ABI is > still the soft-float ABI since floating point args and return values > get passed in GP registers. Just one question: > > > diff --git a/arch/powerpc/bits/fenv.h b/arch/powerpc/bits/fenv.h > > index 2f722e6..c5a3e5c 100644 > > --- a/arch/powerpc/bits/fenv.h > > +++ b/arch/powerpc/bits/fenv.h > > @@ -1,3 +1,7 @@ > > +#ifdef _SOFT_FLOAT > > +#define FE_ALL_EXCEPT 0 > > +#define FE_TONEAREST 0 > > +#else > > #define FE_TONEAREST 0 > > #define FE_TOWARDZERO 1 > > #define FE_UPWARD 2 > > @@ -24,6 +28,7 @@ > > Does the _SOFT_FLOAT macro accurately represent that the "soft float > ABI" (float args/returns in GP registers) is being used, or is it only > defined when floating point has been completely disabled? > > Aside from this question, the patch looks great. Thanks! I've left this pending way too long so I'm just committing it, but I still do want to check out the situation with SPE. For now I'm going to add a configure test that will hopefully error out on SPE hard-float (because I don't think the current #ifdefs and sj/lj impl are valid to handle it, even though it may conceptually be -sf ABI compatible) and we can take that out and enable SPE hard-float later if it's actually ABI-compatible and we figure out the right #ifdefs. Rich
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