Follow @Openwall on Twitter for new release announcements and other news
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Tue, 14 Jul 2020 21:41:29 -0700
From: Sean Christopherson <sean.j.christopherson@...el.com>
To: "Andersen, John" <john.s.andersen@...el.com>
Cc: Andy Lutomirski <luto@...nel.org>,
	Arvind Sankar <nivedita@...m.mit.edu>,
	Dave Hansen <dave.hansen@...el.com>,
	Paolo Bonzini <pbonzini@...hat.com>,
	Jonathan Corbet <corbet@....net>,
	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
	X86 ML <x86@...nel.org>, "H. Peter Anvin" <hpa@...or.com>,
	Shuah Khan <shuah@...nel.org>, Liran Alon <liran.alon@...cle.com>,
	Andrew Jones <drjones@...hat.com>,
	Rick Edgecombe <rick.p.edgecombe@...el.com>,
	Kristen Carlson Accardi <kristen@...ux.intel.com>,
	Vitaly Kuznetsov <vkuznets@...hat.com>,
	Wanpeng Li <wanpengli@...cent.com>,
	Jim Mattson <jmattson@...gle.com>, Joerg Roedel <joro@...tes.org>,
	Mauro Carvalho Chehab <mchehab+huawei@...nel.org>,
	Greg KH <gregkh@...uxfoundation.org>,
	"Paul E. McKenney" <paulmck@...nel.org>,
	Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
	Juergen Gross <jgross@...e.com>,
	Mike Kravetz <mike.kravetz@...cle.com>,
	Oliver Neukum <oneukum@...e.com>,
	Peter Zijlstra <peterz@...radead.org>,
	Fenghua Yu <fenghua.yu@...el.com>, reinette.chatre@...el.com,
	vineela.tummalapalli@...el.com,
	Dave Hansen <dave.hansen@...ux.intel.com>,
	Arjan van de Ven <arjan@...ux.intel.com>, caoj.fnst@...fujitsu.com,
	Baoquan He <bhe@...hat.com>, Kees Cook <keescook@...omium.org>,
	Dan Williams <dan.j.williams@...el.com>, eric.auger@...hat.com,
	aaronlewis@...gle.com, Peter Xu <peterx@...hat.com>,
	makarandsonare@...gle.com,
	"open list:DOCUMENTATION" <linux-doc@...r.kernel.org>,
	LKML <linux-kernel@...r.kernel.org>, kvm list <kvm@...r.kernel.org>,
	"open list:KERNEL SELFTEST FRAMEWORK" <linux-kselftest@...r.kernel.org>,
	Kernel Hardening <kernel-hardening@...ts.openwall.com>
Subject: Re: [PATCH 2/4] KVM: x86: Introduce paravirt feature CR0/CR4 pinning

On Tue, Jul 14, 2020 at 05:39:30AM +0000, Andersen, John wrote:
> With regards to FSGSBASE, are we open to validating and adding that to the
> DEFAULT set as a part of a separate patchset? This patchset is focused on
> replicating the functionality we already have natively.

Kees added FSGSBASE pinning in commit a13b9d0b97211 ("x86/cpu: Use pinning
mask for CR4 bits needing to be 0"), so I believe it's a done deal already.

Powered by blists - more mailing lists

Confused about mailing lists and their use? Read about mailing lists on Wikipedia and check out these guidelines on proper formatting of your messages.