Date: Thu, 7 May 2020 14:43:00 +0100 From: Catalin Marinas <catalin.marinas@....com> To: Will Deacon <will@...nel.org> Cc: Ard Biesheuvel <ardb@...nel.org>, Linux ARM <linux-arm-kernel@...ts.infradead.org>, kernel-hardening@...ts.openwall.com, Mark Rutland <mark.rutland@....com> Subject: Re: [RFC PATCH] arm64: remove CONFIG_DEBUG_ALIGN_RODATA feature On Tue, May 05, 2020 at 11:44:06AM +0100, Will Deacon wrote: > Catalin -- did you get anything back from the architects about the cache > hit behaviour? Any read from a non-cacheable alias would be coherent with writes using the same non-cacheable attributes, irrespective of other cacheable aliases (of course, subject to the cache lines having been previously cleaned/invalidated to avoid dirty lines evictions). So as long as the hardware works as per the ARM ARM (B2.8), we don't need to unmap the non-cacheable DMA buffers from the linear map. -- Catalin
Powered by blists - more mailing lists
Confused about mailing lists and their use? Read about mailing lists on Wikipedia and check out these guidelines on proper formatting of your messages.