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Date: Fri, 6 Dec 2019 08:35:09 -0800
From: Thomas Garnier <thgarnie@...omium.org>
To: Peter Zijlstra <peterz@...radead.org>
Cc: Kernel Hardening <kernel-hardening@...ts.openwall.com>,
Kristen Carlson Accardi <kristen@...ux.intel.com>, Kees Cook <keescook@...omium.org>,
Andy Lutomirski <luto@...nel.org>, Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>, "H. Peter Anvin" <hpa@...or.com>, "the arch/x86 maintainers" <x86@...nel.org>,
LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v10 04/11] x86/entry/64: Adapt assembly for PIE support
On Fri, Dec 6, 2019 at 2:27 AM Peter Zijlstra <peterz@...radead.org> wrote:
>
> On Thu, Dec 05, 2019 at 09:01:50AM -0800, Thomas Garnier wrote:
> > On Thu, Dec 5, 2019 at 1:04 AM Peter Zijlstra <peterz@...radead.org> wrote:
> > > On Wed, Dec 04, 2019 at 04:09:41PM -0800, Thomas Garnier wrote:
> > >
> > > > @@ -1625,7 +1627,11 @@ first_nmi:
> > > > addq $8, (%rsp) /* Fix up RSP */
> > > > pushfq /* RFLAGS */
> > > > pushq $__KERNEL_CS /* CS */
> > > > - pushq $1f /* RIP */
> > > > + pushq $0 /* Future return address */
> > >
> > > We're building an IRET frame, the IRET frame does not have a 'future
> > > return address' field.
> >
> > I assumed that's the target RIP after iretq.
>
> It is. But it's still the (R)IP field of the IRET frame. Calling it
> anything else is just confusing. The frame is 5 words: SS, (R)SP, (R)FLAGS,
> CS, (R)IP.
>
> > > > + pushq %rdx /* Save RAX */
> > > > + leaq 1f(%rip), %rdx /* RIP */
> > >
> > > nonsensical comment
> >
> > That was the same comment from the push $1f that I changed.
>
> Yes, but there it made sense since the PUSH actually created that field
> of the frame, here it is nonsensical. What this instruction does is put
> the address of the '1f' label into RDX, which is then stuck into the
> (R)IP field on the next instruction.
Got it, make sense. Thanks.
>
> > > > + movq %rdx, 8(%rsp) /* Put 1f on return address */
> > > > + popq %rdx /* Restore RAX */
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