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Date: Fri, 25 Oct 2019 14:40:11 -0700
From: Sami Tolvanen <samitolvanen@...gle.com>
To: Mark Rutland <mark.rutland@....com>
Cc: Will Deacon <will@...nel.org>, Catalin Marinas <catalin.marinas@....com>,
Steven Rostedt <rostedt@...dmis.org>, Masami Hiramatsu <mhiramat@...nel.org>,
Ard Biesheuvel <ard.biesheuvel@...aro.org>, Dave Martin <Dave.Martin@....com>,
Kees Cook <keescook@...omium.org>, Laura Abbott <labbott@...hat.com>,
Nick Desaulniers <ndesaulniers@...gle.com>, Jann Horn <jannh@...gle.com>,
Miguel Ojeda <miguel.ojeda.sandonis@...il.com>,
Masahiro Yamada <yamada.masahiro@...ionext.com>,
clang-built-linux <clang-built-linux@...glegroups.com>,
Kernel Hardening <kernel-hardening@...ts.openwall.com>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>, LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 02/17] arm64/lib: copy_page: avoid x18 register in
assembler code
On Fri, Oct 25, 2019 at 2:41 AM Mark Rutland <mark.rutland@....com> wrote:
> > diff --git a/arch/arm64/lib/copy_page.S b/arch/arm64/lib/copy_page.S
> > index bbb8562396af..8b562264c165 100644
> > --- a/arch/arm64/lib/copy_page.S
> > +++ b/arch/arm64/lib/copy_page.S
> > @@ -34,45 +34,45 @@ alternative_else_nop_endif
> > ldp x14, x15, [x1, #96]
> > ldp x16, x17, [x1, #112]
> >
> > - mov x18, #(PAGE_SIZE - 128)
> > + add x0, x0, #256
> > add x1, x1, #128
> > 1:
> > - subs x18, x18, #128
> > + tst x0, #(PAGE_SIZE - 1)
> >
> > alternative_if ARM64_HAS_NO_HW_PREFETCH
> > prfm pldl1strm, [x1, #384]
> > alternative_else_nop_endif
> >
> > - stnp x2, x3, [x0]
> > + stnp x2, x3, [x0, #-256]
> > ldp x2, x3, [x1]
> > - stnp x4, x5, [x0, #16]
> > + stnp x4, x5, [x0, #-240]
> > ldp x4, x5, [x1, #16]
>
> For legibility, could we make the offset and bias explicit in the STNPs
> so that these line up? e.g.
>
> stnp x4, x5, [x0, #16 - 256]
> ldp x4, x5, [x1, #16]
>
> ... that'd make it much easier to see by eye that this is sound, much as
> I trust my mental arithmetic. ;)
Sure, that makes sense. I'll change this in v3.
Sami
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