Date: Tue, 11 Sep 2018 20:02:53 +0200 From: Jann Horn <jannh@...gle.com> To: kristen@...ux.intel.com Cc: Kernel Hardening <kernel-hardening@...ts.openwall.com> Subject: Re: [RFC PATCH] x86: entry: flush the cache if syscall error On Mon, Sep 10, 2018 at 9:14 PM Kristen Carlson Accardi <kristen@...ux.intel.com> wrote: > This patch aims to make it harder to perform cache timing attacks on data > left behind by system calls. If we have an error returned from a syscall, > flush the L1 cache. How much protection does this provide, given that it e.g. doesn't flush L2/L3 and doesn't prevent data leakage through hyperthreading and cache coherency? Is an L2/L3-based attack expected to be harder than an L1D-based one?
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