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Date: Sat, 8 Apr 2017 08:20:03 -0700
From: Andy Lutomirski <luto@...nel.org>
To: Daniel Micay <danielmicay@...il.com>
Cc: Andy Lutomirski <luto@...nel.org>, Mathias Krause <minipli@...glemail.com>, 
	Thomas Gleixner <tglx@...utronix.de>, Kees Cook <keescook@...omium.org>, 
	"kernel-hardening@...ts.openwall.com" <kernel-hardening@...ts.openwall.com>, Mark Rutland <mark.rutland@....com>, 
	Hoeun Ryu <hoeun.ryu@...il.com>, PaX Team <pageexec@...email.hu>, 
	Emese Revfy <re.emese@...il.com>, Russell King <linux@...linux.org.uk>, X86 ML <x86@...nel.org>, 
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>, 
	"linux-arm-kernel@...ts.infradead.org" <linux-arm-kernel@...ts.infradead.org>, 
	Peter Zijlstra <peterz@...radead.org>
Subject: Re: Re: [RFC v2][PATCH 04/11] x86: Implement __arch_rare_write_begin/unmap()

On Sat, Apr 8, 2017 at 12:33 AM, Daniel Micay <danielmicay@...il.com> wrote:
> The
> submitted code is aimed at rare writes to globals, but this feature is
> more than that and design decisions shouldn't be based on just the
> short term.

Then, if you disagree with a proposed design, *explain why* in a
standalone manner.  Say what future uses a different design would
have.

> I actually care a lot more about 64-bit ARM support than I do x86, but
> using a portable API for pax_open_kernel (for the simple uses at
> least) is separate from choosing the underlying implementation. There
> might not be a great way to do it on the architectures I care about
> but that doesn't need to hinder x86. It's really not that much code...
> A weaker/slower implementation for x86 also encourages the same
> elsewhere.

No one has explained how CR0.WP is weaker or slower than my proposal.
Here's what I'm proposing:

At boot, choose a random address A.  Create an mm_struct that has a
single VMA starting at A that represents the kernel's rarely-written
section.  Compute O = (A - VA of rarely-written section).  To do a
rare write, use_mm() the mm, write to (VA + O), then unuse_mm().

This should work on any arch that has an MMU that allows this type of
aliasing and that doesn't have PA-based protections on the
rarely-written section.

It'll be considerably slower than CR0.WP on a current x86 kernel, but,
with PCID landed, it shouldn't be much slower.  It has the added
benefit that writes to non-rare-write data using the rare-write
primitive will fail.

--Andy

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