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Date: Thu, 2 Feb 2017 11:19:28 -0800
From: Kees Cook <>
To: Bhupesh Sharma <>
Cc: "" <>, 
	"" <>, Daniel Cashman <>, 
	Michael Ellerman <>, Bhupesh SHARMA <>, 
	Alexander Graf <>, Benjamin Herrenschmidt <>, 
	Paul Mackerras <>, Anatolij Gustschin <>, 
	Alistair Popple <>, Matt Porter <>, 
	Vitaly Bordug <>, Scott Wood <>, 
	Kumar Gala <>, Daniel Cashman <>
Subject: Re: [PATCH 0/2] RFC: Adjust powerpc ASLR elf randomness

On Thu, Feb 2, 2017 at 10:08 AM, Bhupesh Sharma <> wrote:
> On Thu, Feb 2, 2017 at 7:51 PM, Kees Cook <> wrote:
>> On Wed, Feb 1, 2017 at 9:42 PM, Bhupesh Sharma <> wrote:
>>> The 2nd patch increases the ELF_ET_DYN_BASE value from the current
>>> hardcoded value of 0x2000_0000 to something more practical,
>>> i.e. TASK_SIZE - PAGE_SHIFT (which makes sense especially for
>>> 64-bit platforms which would like to utilize more randomization
>>> in the load address of a PIE elf).
>> I don't think you want this second patch. Moving ELF_ET_DYN_BASE to
>> the top of TASK_SIZE means you'll be constantly colliding with stack
>> and mmap randomization. 0x20000000 is way better since it randomizes
>> up from there towards the mmap area.
>> Is there a reason to avoid the 32-bit memory range for the ELF addresses?
> I think you are right. Hmm, I think I was going by my particular use
> case which might not be required for generic PPC platforms.
> I have one doubt though - I have primarily worked on arm64 and x86
> architectures and there I see there 64-bit user space applications
> using the 64-bit load addresses/ranges. I am not sure why PPC64 is
> different historically.

x86's ELF_ET_DYN_BASE is (TASK_SIZE / 3 * 2), so it puts it ET_DYN
base at the top third of the address space. (In theory, this is to
avoid interpreter collisions, but I'm working on removing that
restriction, as it seems pointless.)

Other architectures have small ELF_ET_DYN_BASEs, which is good: it
allows them to have larger entropy for ET_DYN.


Kees Cook
Pixel Security

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