Date: Tue, 1 Nov 2016 08:53:55 +0100 From: Daniel Gruss <daniel@...ss.cc> To: kernel-hardening@...ts.openwall.com, Pavel Machek <pavel@....cz> Cc: Mark Rutland <mark.rutland@....com>, Kees Cook <keescook@...omium.org>, Peter Zijlstra <peterz@...radead.org>, Arnaldo Carvalho de Melo <acme@...hat.com>, kernel list <linux-kernel@...r.kernel.org>, Ingo Molnar <mingo@...hat.com>, Alexander Shishkin <alexander.shishkin@...ux.intel.com> Subject: Re: rowhammer protection [was Re: Getting interrupt every million cache misses] On 01.11.2016 07:33, Ingo Molnar wrote: > Can you suggest a method to find heavily rowhammer affected hardware? Only by > testing it, or are there some chipset IDs ranges or dmidecode info that will > pinpoint potentially affected machines? I have worked with many different systems both on running rowhammer attacks and testing defense mechanisms. So far, every Ivy Bridge i5 (DDR3) that I had access to was susceptible to bit flips - you will have highest chances with Ivy Bridge i5...
Powered by blists - more mailing lists
Confused about mailing lists and their use? Read about mailing lists on Wikipedia and check out these guidelines on proper formatting of your messages.