Date: Fri, 4 Oct 2013 06:35:15 +0400 From: Solar Designer <solar@...nwall.com> To: john-dev@...ts.openwall.com Subject: Re: AMD GPU documentation (was: Daniel's weekly report #15) On Fri, Oct 04, 2013 at 06:32:58AM +0400, Solar Designer wrote: > In particular, page 165+ in SI_3D_registers.pdf describes "Shared Of course, s/Shared/Shader/ (I occasionally mistype entire words). > Program Registers", which includes things such as "Number of VGPRs, > granularity 4. Range is from 0-63 allocating 4, 8, 12, ... 256" - a > certain 6-bit value at a certain address (memory-mapped register?) > This might answer, negatively, my question on whether we can go beyond > 256 VGPRs for a single work-item. Alexander
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