Date: Fri, 9 Aug 2013 16:52:25 +0400 From: Solar Designer <solar@...nwall.com> To: Sylvain Munaut <246tnt@...il.com> Cc: john-dev@...ts.openwall.com Subject: Re: FPGA reprogramming on ZedBoard / Parallella board On Fri, Aug 09, 2013 at 02:02:14PM +0200, Sylvain Munaut wrote: > > The problem we're having is that the bitstream Katja generated using > > (I think) the guide you mentioned results in non-working Ethernet > > (at least). > > Is that on a gigabit hub ? Or 10/100 ? It's on 100M. > When rebuilding the kernel/device tree/fsbl, the device tree has some > issue with the PHY init that makes it work in gigabit mode only. > > See http://forums.parallella.org/viewtopic.php?f=10&t=320 Oh, I did not realize/recall this problem was rebuild related. Should we use the patch from http://forums.parallella.org/viewtopic.php?f=10&t=320#p2012 ? We're currently using a ZedBoard + FMC similar to what you used. Thank you! Alexander
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