oss-security - CVE request: kernel: perf, x86: fix Intel fixed counters base initialization

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Date: Wed, 06 Jul 2011 14:24:36 +0800
From: Eugene Teo <eugene@...hat.com>
To: oss-security@...ts.openwall.com
CC: "Steven M. Christey" <coley@...us.mitre.org>
Subject: CVE request: kernel: perf, x86: fix Intel fixed counters base initialization

The following patch solves the problems introduced by Robert's commit
41bf498 and reported by Arun Sharma. This commit gets rid of the base +
index notation for reading and writing PMU msrs.

The problem is that for fixed counters, the new calculation for the base
did not take into account the fixed counter indexes, thus all fixed
counters were read/written from fixed counter 0.  Although all fixed
counters share the same config MSR, they each have their own counter
register.

This can cause a local denial of service.

Upstream commit:
http://git.kernel.org/linus/fc66c5210ec2539e800e87d7b3a985323c7be96e

Introduced in:
http://git.kernel.org/linus/41bf498949a263fa0b2d32524b89d696ac330e94

Reference:
https://bugzilla.redhat.com/show_bug.cgi?id=719228

Thanks, Eugene

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