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Date: Sun, 26 Apr 2015 10:06:14 +0800
From: Lei Zhang <>
Subject: Re: [GSoC] JtR SIMD support enhancements

> On Apr 25, 2015, at 8:02 PM, Solar Designer <> wrote:
> On Thu, Apr 23, 2015 at 11:35:44PM +0800, Lei Zhang wrote:
>> I'm not sure of the "interleave factors". Could you be more specific?
> Do you understand the concept of instruction interleaving?
> Why does it help?
> When to increase the amount of interleaving, and when to stop doing that?
> Can too much interleaving reduce performance, and why?

Currently I don't understand what is instruction interleaving. I'll take some time studying this topic before experimenting with it.


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