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Date: Tue, 22 Apr 2014 10:00:47 +0200
From: Katja Malvoni <>
Subject: Re: ZedBoard: bcrypt

On 22 April 2014 00:02, Solar Designer <> wrote:

> > On my ZedBoard, I get performance of 1855 c/s on self test - lower than
> 70
> > cores because of data transfers.
> And it's unreliable during actual cracking, right?

It can't do actual cracking - every time I've tried it, the board stopped
responding. It didn't reboot, I had to power-cycle it.

> Oh, in those tweets you couldn't read (sorry!), Sylvain suggested that
> we measure Zynq core voltage via its built-in ADC.  Can you try to
> include this in a bitstream?  Is this voltage directly available as ADC
> input or do we need to connect it physically?  (We can ask Sylvain to
> clarify whether he meant a purely software thing or also an added wire.)
> I think this isn't worth much of your time, given that you need to
> refocus on ztex anyway, but it's a nice experiment and a useful tool for
> when we return to Zynq just to include "final" speeds for it on a
> presentation slide or whatever.

I can add AXI XADC ( in
Xilinx platform studio and connect it to PS GPIO via AXI bus.
>From quick glance at,
it seems to be a software thing.


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