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Date: Tue, 1 Oct 2013 11:35:23 +0200
From: Katja Malvoni <kmalvoni@...il.com>
To: john-dev@...ts.openwall.com
Subject: Re: ZedBoard / Parallella: bcrypt
Hi Alexander,
I'm sorry about such long delay, I completely forgot to answer this email.
On Sun, Sep 22, 2013 at 6:24 AM, Solar Designer <solar@...nwall.com> wrote:
> What's the highest clock rate that ISE reports as meeting timing
> constraints for your bcrypt core on this Zynq device?
>
As far as I can tell, ISE doesn't report anything. Bcrypt core is connected
to processing_sytem7 in Xilinx Platform Studio and it's synthesized as part
of processing_system7. There is no clock rate reported for it.
Regarding observed speeds not matching expectations for a given clock
> rate, perhaps you can use higher bcrypt cost settings to reduce the
> effect the overhead has, and then you'll be able to calculate the actual
> clock rate from the observed c/s rate. Maybe this will give a clue.
> For example, $2a$10 should be taking almost a second, and you can go
> even higher than that for greater precision.
>
I will try this later today.
Katja
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