Date: Wed, 15 May 2013 08:14:51 +0400 From: Solar Designer <solar@...nwall.com> To: john-dev@...ts.openwall.com Subject: Re: AMD GCN ISA development Daniel - On Wed, May 15, 2013 at 12:34:18AM +0200, D?niel Bali wrote: > That is the document that I looked at Which one? You fail at quoting e-mails. Please try to improve at that. http://www.complang.tuwien.ac.at/anton/mail-news-errors.html http://www.netmeister.org/news/learn2quote.html > when I was looking for v_add_i32's > parameters. Unfortunately this only shows the microcode op code, They use the word "microcode" to refer to ISA opcodes. I don't know why. > but in the > isa, based on the three lines I pasted below, I believe the op code is > 0x4A. Page 161 (aka 11-67) in AMD_Southern_Islands_Instruction_Set_Architecture.pdf (revision 1.0, August 2012) gives the opcode for V_ADD_I32 as 0x25, but the opcode field starts 1 bit into the 32-bit value for the instruction, with the most significant bit as always zero. This gives us 0x25 * 2 for the most significant byte, and that's the 0x4A that you see. > Here are three different v_add_i32 instructions: > > v_add_i32 v0, vcc, s0, v0 // 00000050: > 4A000000 The zeroes mean SGPR0 for first source operand, but VGPR0 for second source and for destination. (To have VGPR0 as the first source as well, you'd specify it as 0x100 - this is a 9-bit field.) > v_add_i32 v1, vcc, 42, v1 // 00000058: > 4A0202BF (from sample_42.isa) The 0x02's refer to VGPR1. They appear as 2's and not 1's because the SRC0 field is 9-bit. The 0x0BF (9-bit) should represent the constant 42, where the range 129 to 192 decimal is used to represent values 1 to 64, but somehow this is not the case?! The value we'd see here for 42 would have been 0x0AA (9-bit) per the documentation. 0x0BF is 191 decimal, so the encoding above would seem to correspond to the integer constant of 63. Maybe it's some copy-paste error on your part? > v_add_i32 v1, vcc, 0x00000063, v1 // 00000058: 4A0202FF > 00000063 (from sample_99.isa) In the third one of these, the 0x0FF (9-bit) means "Literal constant" - that is, that the instruction has the extra 32-bit word for the constant. This is as per page 263 (12-15). Alexander
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