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Date: Sun, 24 Jun 2012 18:15:15 -0300
From: Claudio André <>
Subject: Re: Off-topic (was: bf-opencl )

Hi, my two (incomplete) cents.

My code has 7k IL, 6k ISA code lines (i mean i looked closer on ISA, on 
IL i checked line count on gedit). But I can get 20k ISA lines using 
imaginative strategies.

If you haven't tried, i think AMD Kernel Analyzer is the best shot. And 
[1] is very good news if you want to dig into it.

JtR target is the best performance, so, it means experiment with IL. It 
is not my king of pleasure programming to low level, hope it is yours. 
Of course, i agree that you can get the best possible results if you 
change/develop your IL, ISA or PTX code. But it is something i 'm not 
interested because:
1. lock in.
2. it is much, much, i really mean much, harder.
3. AMD software is weak [2][3] (but i suppose it is not going to stay 
this way for ever).
4. NVIDIA software is not perfect [4] (but it is improving).

I trust understanding IL is going to be a lonely trip, but using the 
Kernel Analyzer, you might discover a lot of new things. Even, how to 
patch your kernel and get better results.

[2] A terrible sin: See [ 
*MicahVillmow <>*15/03/2012 
<> (He researches on nvcc 
improvement, if you want to get a "feeling" from a specialist on 
compilers area, he is nice guy to ask for some advice).


Em 24-06-2012 02:45, SAYANTAN DATTA escreveu:
> Hi Alexander,
> I'm trying to get my grasp on AMD IL but I am unable to understand a 
> few concepts. Can you explain what is the purpose of using 
> UAVs(Unordered Access View) ?What are scatter /gather loads ? Also how 
> am I supposed to optimize the codes using IL? I mean the generated IL 
> has almost 10k lines of instructions in the most time consuming loop. 
> So do I have to read each instruction to find out the bottleneck? Any 
> suggestions is greately appreciated?   I think at the moment you are 
> busy with the release of jumbo-6. So there is no hurry,reply when you 
> have the time.
> Regards,
> Sayantan

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