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Date: Thu, 10 Dec 2015 17:04:01 -0800
From: David Brown <david.brown@...aro.org>
To: Kees Cook <keescook@...omium.org>
Cc: "kernel-hardening@...ts.openwall.com" <kernel-hardening@...ts.openwall.com>,
Catalin Marinas <catalin.marinas@....com>
Subject: Re: Self Introduction
On Thu, Dec 10, 2015 at 03:52:16PM -0800, Kees Cook wrote:
>David, getting back to something that might good to get your help
>with: would you be able to test Catalin's LPAE TTBR0 PAN series on
>real hardware? (Are you familiar with the LKDTM tests for this[1]?)
I was planning on this. It's probably going to be a little while (as
in January) before I have any reasonable hardware to test things on,
though. I have one board I need to get working, and another is in the
mail. Both, however, are A53-based, which gets all of the other
configurations. I'll see if I can figure out how to get access to our
test infrastructure.
I am familiar with LKDTM, and it's how I was able to test PAN easily.
Thanks,
David
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