------------------------------------------------------------------------ r4920 | rich | 2015-02-08 07:46:41 -0600 (Sun, 08 Feb 2015) | 1 line Added support for the Cortex-M. ------------------------------------------------------------------------ Index: src/internal/arm/syscall.s =================================================================== --- src/internal/arm/syscall.s (revision 4919) +++ src/internal/arm/syscall.s (revision 4920) @@ -11,5 +11,6 @@ svc 0 ldmfd sp!,{r4,r5,r6,r7} tst lr,#1 + it eq moveq pc,lr bx lr Index: src/ldso/arm/start.s =================================================================== --- src/ldso/arm/start.s (revision 4919) +++ src/ldso/arm/start.s (revision 4920) @@ -14,5 +14,6 @@ mov r1,r0 mov r0,#0 tst r1,#1 + it eq moveq pc,r1 bx r1 Index: src/setjmp/arm/longjmp.s =================================================================== --- src/setjmp/arm/longjmp.s (revision 4919) +++ src/setjmp/arm/longjmp.s (revision 4920) @@ -1,37 +0,0 @@ -.global _longjmp -.global longjmp -.type _longjmp,%function -.type longjmp,%function -_longjmp: -longjmp: - mov ip,r0 - movs r0,r1 - moveq r0,#1 - ldmia ip!, {v1,v2,v3,v4,v5,v6,sl,fp,sp,lr} - - adr r1,1f - ldr r2,1f - ldr r1,[r1,r2] - - tst r1,#0x260 - beq 3f - tst r1,#0x20 - beq 2f - ldc p2, cr4, [ip], #48 -2: tst r1,#0x40 - beq 2f - .word 0xecbc8b10 /* vldmia ip!, {d8-d15} */ -2: tst r1,#0x200 - beq 3f - ldcl p1, cr10, [ip], #8 - ldcl p1, cr11, [ip], #8 - ldcl p1, cr12, [ip], #8 - ldcl p1, cr13, [ip], #8 - ldcl p1, cr14, [ip], #8 - ldcl p1, cr15, [ip], #8 -3: tst lr,#1 - moveq pc,lr - bx lr - -.hidden __hwcap -1: .word __hwcap-1b Index: src/setjmp/arm/setjmp.s =================================================================== --- src/setjmp/arm/setjmp.s (revision 4919) +++ src/setjmp/arm/setjmp.s (revision 4920) @@ -1,39 +0,0 @@ -.global __setjmp -.global _setjmp -.global setjmp -.type __setjmp,%function -.type _setjmp,%function -.type setjmp,%function -__setjmp: -_setjmp: -setjmp: - mov ip,r0 - stmia ip!,{v1,v2,v3,v4,v5,v6,sl,fp,sp,lr} - mov r0,#0 - - adr r1,1f - ldr r2,1f - ldr r1,[r1,r2] - - tst r1,#0x260 - beq 3f - tst r1,#0x20 - beq 2f - stc p2, cr4, [ip], #48 -2: tst r1,#0x40 - beq 2f - .word 0xecac8b10 /* vstmia ip!, {d8-d15} */ -2: tst r1,#0x200 - beq 3f - stcl p1, cr10, [ip], #8 - stcl p1, cr11, [ip], #8 - stcl p1, cr12, [ip], #8 - stcl p1, cr13, [ip], #8 - stcl p1, cr14, [ip], #8 - stcl p1, cr15, [ip], #8 -3: tst lr,#1 - moveq pc,lr - bx lr - -.hidden __hwcap -1: .word __hwcap-1b Index: src/setjmp/arm/setjmp.S =================================================================== --- src/setjmp/arm/setjmp.S (revision 0) +++ src/setjmp/arm/setjmp.S (revision 4920) @@ -0,0 +1,45 @@ +.global __setjmp +.global _setjmp +.global setjmp +.type __setjmp,%function +.type _setjmp,%function +.type setjmp,%function +__setjmp: +_setjmp: +setjmp: + mov ip,r0 +#if defined(__thumb__) + stmia ip!,{v1,v2,v3,v4,v5,v6,sl,fp,lr} + str sp, [ip], #4 +#else + stmia ip!,{v1,v2,v3,v4,v5,v6,sl,fp,sp,lr} +#endif + mov r0,#0 + + adr r1,1f + ldr r2,1f + ldr r1,[r1,r2] + + tst r1,#0x260 + beq 3f + tst r1,#0x20 + beq 2f + stc p2, cr4, [ip], #48 +2: tst r1,#0x40 + beq 2f + .word 0xecac8b10 /* vstmia ip!, {d8-d15} */ +2: tst r1,#0x200 + beq 3f + stcl p1, cr10, [ip], #8 + stcl p1, cr11, [ip], #8 + stcl p1, cr12, [ip], #8 + stcl p1, cr13, [ip], #8 + stcl p1, cr14, [ip], #8 + stcl p1, cr15, [ip], #8 +3: tst lr,#1 + it eq + moveq pc,lr + bx lr + +.hidden __hwcap +1: .word __hwcap-1b Index: src/setjmp/arm/longjmp.S =================================================================== --- src/setjmp/arm/longjmp.S (revision 0) +++ src/setjmp/arm/longjmp.S (revision 4920) @@ -0,0 +1,44 @@ +.global _longjmp +.global longjmp +.type _longjmp,%function +.type longjmp,%function +_longjmp: +longjmp: + mov ip,r0 + movs r0,r1 + it eq + moveq r0,#1 +#if defined(__thumb__) + ldmia ip!, {v1,v2,v3,v4,v5,v6,sl,fp,lr} + ldr sp, [ip], #4 +#else + ldmia ip!, {v1,v2,v3,v4,v5,v6,sl,fp,sp,lr} +#endif + + adr r1,1f + ldr r2,1f + ldr r1,[r1,r2] + + tst r1,#0x260 + beq 3f + tst r1,#0x20 + beq 2f + ldc p2, cr4, [ip], #48 +2: tst r1,#0x40 + beq 2f + .word 0xecbc8b10 /* vldmia ip!, {d8-d15} */ +2: tst r1,#0x200 + beq 3f + ldcl p1, cr10, [ip], #8 + ldcl p1, cr11, [ip], #8 + ldcl p1, cr12, [ip], #8 + ldcl p1, cr13, [ip], #8 + ldcl p1, cr14, [ip], #8 + ldcl p1, cr15, [ip], #8 +3: tst lr,#1 + it eq + moveq pc,lr + bx lr + +.hidden __hwcap +1: .word __hwcap-1b Index: src/thread/arm/syscall_cp.s =================================================================== --- src/thread/arm/syscall_cp.s (revision 4919) +++ src/thread/arm/syscall_cp.s (revision 4920) @@ -7,6 +7,7 @@ __cp_begin: ldr r0,[r0] cmp r0,#0 + it ne blne __cancel mov r7,r1 mov r0,r2 @@ -17,5 +18,6 @@ __cp_end: ldmfd sp!,{r4,r5,r6,r7,lr} tst lr,#1 + it eq moveq pc,lr bx lr Index: src/thread/arm/clone.s =================================================================== --- src/thread/arm/clone.s (revision 4919) +++ src/thread/arm/clone.s (revision 4920) @@ -16,6 +16,7 @@ beq 1f ldmfd sp!,{r4,r5,r6,r7} tst lr,#1 + it eq moveq pc,lr bx lr Index: crt/arm/crtn.s =================================================================== --- crt/arm/crtn.s (revision 4919) +++ crt/arm/crtn.s (revision 4920) @@ -1,6 +1,7 @@ .section .init pop {r0,lr} tst lr,#1 + it eq moveq pc,lr bx lr @@ -7,5 +8,6 @@ .section .fini pop {r0,lr} tst lr,#1 + it eq moveq pc,lr bx lr Index: Makefile =================================================================== --- Makefile (revision 4919) +++ Makefile (revision 4920) @@ -106,6 +106,10 @@ $(dir $(patsubst %/,%,$(dir $(1))))$(notdir $(1:.s=.o)): $(1) endef $(foreach s,$(wildcard src/*/$(ARCH)*/*.s),$(eval $(call mkasmdep,$(s)))) +define mkasmdepS +$(dir $(patsubst %/,%,$(dir $(1))))$(notdir $(1:.S=.o)): $(1) +endef +$(foreach s,$(wildcard src/*/$(ARCH)*/*.S),$(eval $(call mkasmdepS,$(s)))) %.o: $(ARCH)$(ASMSUBARCH)/%.sub $(CC) $(CFLAGS_ALL_STATIC) -c -o $@ $(dir $<)$(shell cat $<) @@ -113,6 +117,9 @@ %.o: $(ARCH)/%.s $(CC) $(CFLAGS_ALL_STATIC) -c -o $@ $< +%.o: $(ARCH)/%.S + $(CC) $(CFLAGS_ALL_STATIC) -c -o $@ $< + %.o: %.c $(GENH) $(IMPH) $(CC) $(CFLAGS_ALL_STATIC) -c -o $@ $< @@ -122,6 +129,9 @@ %.lo: $(ARCH)/%.s $(CC) $(CFLAGS_ALL_SHARED) -c -o $@ $< +%.lo: $(ARCH)/%.S + $(CC) $(CFLAGS_ALL_SHARED) -c -o $@ $< + %.lo: %.c $(GENH) $(IMPH) $(CC) $(CFLAGS_ALL_SHARED) -c -o $@ $< Index: arch/arm/src/arm/atomics.s =================================================================== --- arch/arm/src/arm/atomics.s (revision 4919) +++ arch/arm/src/arm/atomics.s (revision 4920) @@ -6,12 +6,13 @@ __a_barrier: ldr ip,1f ldr ip,[pc,ip] - add pc,pc,ip + add pc,ip 1: .word __a_barrier_ptr-1b .global __a_barrier_dummy .hidden __a_barrier_dummy __a_barrier_dummy: tst lr,#1 + it eq moveq pc,lr bx lr .global __a_barrier_oldkuser @@ -25,6 +26,7 @@ mov pc,ip pop {r0,r1,r2,r3,ip,lr} tst lr,#1 + it eq moveq pc,lr bx lr .global __a_barrier_v6 @@ -44,7 +46,7 @@ __a_cas: ldr ip,1f ldr ip,[pc,ip] - add pc,pc,ip + add pc,ip 1: .word __a_cas_ptr-1b .global __a_cas_dummy .hidden __a_cas_dummy @@ -52,8 +54,10 @@ mov r3,r0 ldr r0,[r2] subs r0,r3,r0 + it eq streq r1,[r2] tst lr,#1 + it eq moveq pc,lr bx lr .global __a_cas_v6 @@ -64,6 +68,7 @@ 1: .word 0xe1920f9f /* ldrex r0,[r2] */ subs r0,r3,r0 .word 0x01820f91 /* strexeq r0,r1,[r2] */ + it eq teqeq r0,#1 beq 1b mcr p15,0,r0,c7,c10,5 @@ -76,6 +81,7 @@ 1: .word 0xe1920f9f /* ldrex r0,[r2] */ subs r0,r3,r0 .word 0x01820f91 /* strexeq r0,r1,[r2] */ + it eq teqeq r0,#1 beq 1b .word 0xf57ff05b /* dmb ish */ @@ -91,7 +97,7 @@ __a_gettp: ldr r0,1f ldr r0,[pc,r0] - add pc,pc,r0 + add pc,r0 1: .word __a_gettp_ptr-1b .global __a_gettp_dummy .hidden __a_gettp_dummy Index: arch/arm/crt_arch.h =================================================================== --- arch/arm/crt_arch.h (revision 4919) +++ arch/arm/crt_arch.h (revision 4920) @@ -1,11 +1,17 @@ -__asm__("\ -.text \n\ -.global _start \n\ -.type _start,%function \n\ -_start: \n\ - mov fp, #0 \n\ - mov lr, #0 \n\ - mov a1, sp \n\ - bic sp, sp, #0xF \n\ - bl __cstart \n\ -"); +__asm__( +".text \n" +".global _start \n" +".type _start,%function \n" +"_start: \n" +" mov fp, #0 \n" +" mov lr, #0 \n" +" mov a1, sp \n" +#if defined(__thumb__) +" mov a2, sp \n" +" bic a2, #0xF \n" +" mov sp, a2 \n" +#else +" bic sp, sp, #0xF \n" +#endif +" bl __cstart \n" +);