>From 9d72449f4d2216dd6eccad8f635157fb5799aed1 Mon Sep 17 00:00:00 2001 From: Szabolcs Nagy Date: Tue, 21 Jul 2015 20:00:03 +0000 Subject: [PATCH] fix armhf asm to use .fpu vfp and robust mnemonics (1) Some armhf toolchains (gcc built with --with-float=hard but without --with-fpu=vfp*) do not pass -mfpu=vfp to the assembler. Such toolchain can use VFP instructions when compiling C code because it emits a .fpu vfp asm directive. Without the -mfpu option and the .fpu directive the assembler rejects VFP instructions. (2) New binutils/assemblers should support the old mnemonics (before the unified assembler language was introduced) but an old toolchain may not support the new ones. (3) mrc/mcr p10 coprocessor mnemonics are deprecated by some toolchains. Changed VFP instructions to use old mnemonics, replaced mcr/mrc with fmxr/fmrx and added .fpu vfp directive to all armhf asm with VFP instructions. The generated code should not change on toolchains that worked before. --- --- src/fenv/armhf/fenv.s | 22 ++++++++++++---------- src/math/armhf/fabs.s | 3 ++- src/math/armhf/fabsf.s | 3 ++- src/math/armhf/sqrt.s | 3 ++- src/math/armhf/sqrtf.s | 3 ++- 5 files changed, 20 insertions(+), 14 deletions(-) diff --git a/src/fenv/armhf/fenv.s b/src/fenv/armhf/fenv.s index 387234b..e447ca1 100644 --- a/src/fenv/armhf/fenv.s +++ b/src/fenv/armhf/fenv.s @@ -1,17 +1,19 @@ +.fpu vfp + .global fegetround .type fegetround,%function fegetround: - mrc p10, 7, r0, cr1, cr0, 0 + fmrx r0, fpscr and r0, r0, #0xc00000 bx lr .global __fesetround .type __fesetround,%function __fesetround: - mrc p10, 7, r3, cr1, cr0, 0 + fmrx r3, fpscr bic r3, r3, #0xc00000 orr r3, r3, r0 - mcr p10, 7, r3, cr1, cr0, 0 + fmxr fpscr, r3 mov r0, #0 bx lr @@ -19,7 +21,7 @@ __fesetround: .type fetestexcept,%function fetestexcept: and r0, r0, #0x1f - mrc p10, 7, r3, cr1, cr0, 0 + fmrx r3, fpscr and r0, r0, r3 bx lr @@ -27,9 +29,9 @@ fetestexcept: .type feclearexcept,%function feclearexcept: and r0, r0, #0x1f - mrc p10, 7, r3, cr1, cr0, 0 + fmrx r3, fpscr bic r3, r3, r0 - mcr p10, 7, r3, cr1, cr0, 0 + fmxr fpscr, r3 mov r0, #0 bx lr @@ -37,16 +39,16 @@ feclearexcept: .type feraiseexcept,%function feraiseexcept: and r0, r0, #0x1f - mrc p10, 7, r3, cr1, cr0, 0 + fmrx r3, fpscr orr r3, r3, r0 - mcr p10, 7, r3, cr1, cr0, 0 + fmxr fpscr, r3 mov r0, #0 bx lr .global fegetenv .type fegetenv,%function fegetenv: - mrc p10, 7, r3, cr1, cr0, 0 + fmrx r3, fpscr str r3, [r0] mov r0, #0 bx lr @@ -57,6 +59,6 @@ fesetenv: cmn r0, #1 moveq r3, #0 ldrne r3, [r0] - mcr p10, 7, r3, cr1, cr0, 0 + fmxr fpscr, r3 mov r0, #0 bx lr diff --git a/src/math/armhf/fabs.s b/src/math/armhf/fabs.s index 2bdebff..e3b9018 100644 --- a/src/math/armhf/fabs.s +++ b/src/math/armhf/fabs.s @@ -1,6 +1,7 @@ +.fpu vfp .text .global fabs .type fabs,%function fabs: - vabs.f64 d0, d0 + fabsd d0, d0 bx lr diff --git a/src/math/armhf/fabsf.s b/src/math/armhf/fabsf.s index 35c720f..2b2e445 100644 --- a/src/math/armhf/fabsf.s +++ b/src/math/armhf/fabsf.s @@ -1,6 +1,7 @@ +.fpu vfp .text .global fabsf .type fabsf,%function fabsf: - vabs.f32 s0, s0 + fabss s0, s0 bx lr diff --git a/src/math/armhf/sqrt.s b/src/math/armhf/sqrt.s index 99fe64b..abda92f 100644 --- a/src/math/armhf/sqrt.s +++ b/src/math/armhf/sqrt.s @@ -1,6 +1,7 @@ +.fpu vfp .text .global sqrt .type sqrt,%function sqrt: - vsqrt.f64 d0, d0 + fsqrtd d0, d0 bx lr diff --git a/src/math/armhf/sqrtf.s b/src/math/armhf/sqrtf.s index 9ea519f..bbdea8e 100644 --- a/src/math/armhf/sqrtf.s +++ b/src/math/armhf/sqrtf.s @@ -1,6 +1,7 @@ +.fpu vfp .text .global sqrtf .type sqrtf,%function sqrtf: - vsqrt.f32 s0, s0 + fsqrts s0, s0 bx lr -- 2.4.1