commit 817ffbe14ee0ff371c86a379239b31ec17c1b626 Author: Kjell Braden Date: Tue Jul 14 17:20:06 2015 +0200 fix fenv for ARMv7 diff --git a/src/fenv/armhf/fenv.s b/src/fenv/armhf/fenv.s index 387234b..00cacee 100644 --- a/src/fenv/armhf/fenv.s +++ b/src/fenv/armhf/fenv.s @@ -1,17 +1,17 @@ .global fegetround .type fegetround,%function fegetround: - mrc p10, 7, r0, cr1, cr0, 0 + vmrs r0, FPSCR and r0, r0, #0xc00000 bx lr .global __fesetround .type __fesetround,%function __fesetround: - mrc p10, 7, r3, cr1, cr0, 0 + vmrs r3, FPSCR bic r3, r3, #0xc00000 orr r3, r3, r0 - mcr p10, 7, r3, cr1, cr0, 0 + vmsr FPSCR, r3 mov r0, #0 bx lr @@ -19,7 +19,7 @@ __fesetround: .type fetestexcept,%function fetestexcept: and r0, r0, #0x1f - mrc p10, 7, r3, cr1, cr0, 0 + vmrs r3, FPSCR and r0, r0, r3 bx lr @@ -27,9 +27,9 @@ fetestexcept: .type feclearexcept,%function feclearexcept: and r0, r0, #0x1f - mrc p10, 7, r3, cr1, cr0, 0 + vmrs r3, FPSCR bic r3, r3, r0 - mcr p10, 7, r3, cr1, cr0, 0 + vmsr FPSCR, r3 mov r0, #0 bx lr @@ -37,16 +37,16 @@ feclearexcept: .type feraiseexcept,%function feraiseexcept: and r0, r0, #0x1f - mrc p10, 7, r3, cr1, cr0, 0 + vmrs r3, FPSCR orr r3, r3, r0 - mcr p10, 7, r3, cr1, cr0, 0 + vmsr FPSCR, r3 mov r0, #0 bx lr .global fegetenv .type fegetenv,%function fegetenv: - mrc p10, 7, r3, cr1, cr0, 0 + vmrs r3, FPSCR str r3, [r0] mov r0, #0 bx lr @@ -57,6 +57,6 @@ fesetenv: cmn r0, #1 moveq r3, #0 ldrne r3, [r0] - mcr p10, 7, r3, cr1, cr0, 0 + vmsr FPSCR, r3 mov r0, #0 bx lr