Follow @Openwall on Twitter for new release announcements and other news
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date: Fri, 20 Oct 2017 07:47:44 -0700
From: Thomas Garnier <thgarnie@...gle.com>
To: Ingo Molnar <mingo@...nel.org>
Cc: Herbert Xu <herbert@...dor.apana.org.au>, "David S . Miller" <davem@...emloft.net>, 
	Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, "H . Peter Anvin" <hpa@...or.com>, 
	Peter Zijlstra <peterz@...radead.org>, Josh Poimboeuf <jpoimboe@...hat.com>, 
	Arnd Bergmann <arnd@...db.de>, Kees Cook <keescook@...omium.org>, 
	Andrey Ryabinin <aryabinin@...tuozzo.com>, Matthias Kaehlcke <mka@...omium.org>, 
	Tom Lendacky <thomas.lendacky@....com>, Andy Lutomirski <luto@...nel.org>, 
	"Kirill A . Shutemov" <kirill.shutemov@...ux.intel.com>, Borislav Petkov <bp@...e.de>, 
	"Rafael J . Wysocki" <rjw@...ysocki.net>, Len Brown <len.brown@...el.com>, Pavel Machek <pavel@....cz>, 
	Juergen Gross <jgross@...e.com>, Chris Wright <chrisw@...s-sol.org>, 
	Alok Kataria <akataria@...are.com>, Rusty Russell <rusty@...tcorp.com.au>, Tejun Heo <tj@...nel.org>, 
	Christoph Lameter <cl@...ux.com>, Boris Ostrovsky <boris.ostrovsky@...cle.com>, 
	Paul Gortmaker <paul.gortmaker@...driver.com>, Andrew Morton <akpm@...ux-foundation.org>, 
	Alexey Dobriyan <adobriyan@...il.com>, "Paul E . McKenney" <paulmck@...ux.vnet.ibm.com>, 
	Nicolas Pitre <nicolas.pitre@...aro.org>, Borislav Petkov <bp@...en8.de>, 
	"Luis R . Rodriguez" <mcgrof@...nel.org>, Greg Kroah-Hartman <gregkh@...uxfoundation.org>, 
	Christopher Li <sparse@...isli.org>, Steven Rostedt <rostedt@...dmis.org>, 
	Jason Baron <jbaron@...mai.com>, Mika Westerberg <mika.westerberg@...ux.intel.com>, 
	Dou Liyang <douly.fnst@...fujitsu.com>, 
	"Rafael J . Wysocki" <rafael.j.wysocki@...el.com>, Lukas Wunner <lukas@...ner.de>, 
	Masahiro Yamada <yamada.masahiro@...ionext.com>, Alexei Starovoitov <ast@...nel.org>, 
	Daniel Borkmann <daniel@...earbox.net>, Markus Trippelsdorf <markus@...ppelsdorf.de>, 
	Paolo Bonzini <pbonzini@...hat.com>, Radim Krčmář <rkrcmar@...hat.com>, 
	Joerg Roedel <joro@...tes.org>, Rik van Riel <riel@...hat.com>, David Howells <dhowells@...hat.com>, 
	Ard Biesheuvel <ard.biesheuvel@...aro.org>, Waiman Long <longman@...hat.com>, 
	Kyle Huey <me@...ehuey.com>, Jonathan Corbet <corbet@....net>, Michal Hocko <mhocko@...e.com>, 
	Peter Foley <pefoley2@...oley.com>, Paul Bolle <pebolle@...cali.nl>, Jiri Kosina <jkosina@...e.cz>, 
	"H . J . Lu" <hjl.tools@...il.com>, Rob Landley <rob@...dley.net>, Baoquan He <bhe@...hat.com>, 
	Jan H . Schönherr <jschoenh@...zon.de>, 
	Daniel Micay <danielmicay@...il.com>, "the arch/x86 maintainers" <x86@...nel.org>, 
	Linux Crypto Mailing List <linux-crypto@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>, 
	Linux PM list <linux-pm@...r.kernel.org>, virtualization@...ts.linux-foundation.org, 
	xen-devel <xen-devel@...ts.xenproject.org>, linux-arch <linux-arch@...r.kernel.org>, 
	Sparse Mailing-list <linux-sparse@...r.kernel.org>, kvm list <kvm@...r.kernel.org>, 
	linux-doc@...r.kernel.org, 
	Kernel Hardening <kernel-hardening@...ts.openwall.com>
Subject: Re: [PATCH v1 06/27] x86/entry/64: Adapt assembly for PIE support

On Fri, Oct 20, 2017 at 1:26 AM, Ingo Molnar <mingo@...nel.org> wrote:
>
> * Thomas Garnier <thgarnie@...gle.com> wrote:
>
>> Change the assembly code to use only relative references of symbols for the
>> kernel to be PIE compatible.
>>
>> Position Independent Executable (PIE) support will allow to extended the
>> KASLR randomization range below the -2G memory limit.
>>
>> Signed-off-by: Thomas Garnier <thgarnie@...gle.com>
>> ---
>>  arch/x86/entry/entry_64.S | 22 +++++++++++++++-------
>>  1 file changed, 15 insertions(+), 7 deletions(-)
>>
>> diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
>> index 49167258d587..15bd5530d2ae 100644
>> --- a/arch/x86/entry/entry_64.S
>> +++ b/arch/x86/entry/entry_64.S
>> @@ -194,12 +194,15 @@ entry_SYSCALL_64_fastpath:
>>       ja      1f                              /* return -ENOSYS (already in pt_regs->ax) */
>>       movq    %r10, %rcx
>>
>> +     /* Ensures the call is position independent */
>> +     leaq    sys_call_table(%rip), %r11
>> +
>>       /*
>>        * This call instruction is handled specially in stub_ptregs_64.
>>        * It might end up jumping to the slow path.  If it jumps, RAX
>>        * and all argument registers are clobbered.
>>        */
>> -     call    *sys_call_table(, %rax, 8)
>> +     call    *(%r11, %rax, 8)
>>  .Lentry_SYSCALL_64_after_fastpath_call:
>>
>>       movq    %rax, RAX(%rsp)
>> @@ -334,7 +337,8 @@ ENTRY(stub_ptregs_64)
>>        * RAX stores a pointer to the C function implementing the syscall.
>>        * IRQs are on.
>>        */
>> -     cmpq    $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
>> +     leaq    .Lentry_SYSCALL_64_after_fastpath_call(%rip), %r11
>> +     cmpq    %r11, (%rsp)
>>       jne     1f
>>
>>       /*
>> @@ -1172,7 +1176,8 @@ ENTRY(error_entry)
>>       movl    %ecx, %eax                      /* zero extend */
>>       cmpq    %rax, RIP+8(%rsp)
>>       je      .Lbstep_iret
>> -     cmpq    $.Lgs_change, RIP+8(%rsp)
>> +     leaq    .Lgs_change(%rip), %rcx
>> +     cmpq    %rcx, RIP+8(%rsp)
>>       jne     .Lerror_entry_done
>>
>>       /*
>> @@ -1383,10 +1388,10 @@ ENTRY(nmi)
>>        * resume the outer NMI.
>>        */
>>
>> -     movq    $repeat_nmi, %rdx
>> +     leaq    repeat_nmi(%rip), %rdx
>>       cmpq    8(%rsp), %rdx
>>       ja      1f
>> -     movq    $end_repeat_nmi, %rdx
>> +     leaq    end_repeat_nmi(%rip), %rdx
>>       cmpq    8(%rsp), %rdx
>>       ja      nested_nmi_out
>>  1:
>> @@ -1440,7 +1445,8 @@ nested_nmi:
>>       pushq   %rdx
>>       pushfq
>>       pushq   $__KERNEL_CS
>> -     pushq   $repeat_nmi
>> +     leaq    repeat_nmi(%rip), %rdx
>> +     pushq   %rdx
>>
>>       /* Put stack back */
>>       addq    $(6*8), %rsp
>> @@ -1479,7 +1485,9 @@ first_nmi:
>>       addq    $8, (%rsp)      /* Fix up RSP */
>>       pushfq                  /* RFLAGS */
>>       pushq   $__KERNEL_CS    /* CS */
>> -     pushq   $1f             /* RIP */
>> +     pushq   %rax            /* Support Position Independent Code */
>> +     leaq    1f(%rip), %rax  /* RIP */
>> +     xchgq   %rax, (%rsp)    /* Restore RAX, put 1f */
>>       INTERRUPT_RETURN        /* continues at repeat_nmi below */
>>       UNWIND_HINT_IRET_REGS
>
> This patch seems to add extra overhead to the syscall fast-path even when PIE is
> disabled, right?

It does add extra instructions when one is not possible, I preferred
that over ifdefing but I can change it.

>
> Thanks,
>
>         Ingo



-- 
Thomas

Powered by blists - more mailing lists

Confused about mailing lists and their use? Read about mailing lists on Wikipedia and check out these guidelines on proper formatting of your messages.