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Date: Mon, 15 Aug 2016 12:18:58 +0100
From: Mark Rutland <mark.rutland@....com>
To: Catalin Marinas <catalin.marinas@....com>
Cc: linux-arm-kernel@...ts.infradead.org, James Morse <james.morse@....com>,
Will Deacon <will.deacon@....com>,
Kees Cook <keescook@...omium.org>,
kernel-hardening@...ts.openwall.com
Subject: Re: [PATCH 4/7] arm64: Disable TTBR0_EL1 during normal kernel
execution
On Fri, Aug 12, 2016 at 04:27:43PM +0100, Catalin Marinas wrote:
> diff --git a/arch/arm64/include/uapi/asm/ptrace.h b/arch/arm64/include/uapi/asm/ptrace.h
> index b5c3933ed441..9283e6b247f9 100644
> --- a/arch/arm64/include/uapi/asm/ptrace.h
> +++ b/arch/arm64/include/uapi/asm/ptrace.h
> @@ -52,6 +52,8 @@
> #define PSR_Z_BIT 0x40000000
> #define PSR_N_BIT 0x80000000
>
> +#define _PSR_PAN_BIT 22
Given this is under uapi/, shouldn't we lose the leading underscore to align
with other PSR_* definitions?
Or should we not have this under uapi/?
[...]
> + mrs lr, ttbr0_el1
> + tst lr, #0xffff << 48 // Check for the reserved ASID
Did we not have a regular register spare here? Not a problem, but using the lr
here stands out as unusual.
Thanks,
Mark.
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