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Date: Wed, 10 Apr 2013 09:48:27 -0700
From: "H. Peter Anvin" <hpa@...or.com>
To: Eric Northup <digitaleric@...gle.com>
CC: "Eric W. Biederman" <ebiederm@...ssion.com>,
        Ingo Molnar <mingo@...nel.org>, Kees Cook <keescook@...omium.org>,
        Ingo Molnar <mingo@...hat.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        the arch/x86 maintainers <x86@...nel.org>,
        Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
        Jeremy Fitzhardinge <jeremy@...p.org>,
        Marcelo Tosatti <mtosatti@...hat.com>, Alex Shi <alex.shi@...el.com>,
        Borislav Petkov <borislav.petkov@....com>,
        Alexander Duyck <alexander.h.duyck@...el.com>,
        Frederic Weisbecker <fweisbec@...il.com>,
        Steven Rostedt <rostedt@...dmis.org>,
        "Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>,
        Xen Devel <xen-devel@...ts.xensource.com>,
        lf-virt <virtualization@...ts.linux-foundation.org>,
        "kernel-hardening@...ts.openwall.com" <kernel-hardening@...ts.openwall.com>,
        Dan Rosenberg <drosenberg@...curity.com>,
        Julien Tinnes <jln@...gle.com>, Will Drewry <wad@...omium.org>
Subject: Re: [PATCH] x86: make IDT read-only

On 04/10/2013 09:31 AM, Eric Northup wrote:
>>
>> If the effect is measurable I agree it is a legitimate optimization.  At
>> one point there was a suggestion to make the code in the IDT vectors
>> differ based on the which interrupt was registed.  While that can also
>> reduce cache misses that can get hairy very quickly, and of course that
>> would require read-write IDTs.
> 
> read-write IDT or GDT are fine: map them twice, once read+write, once
> read-only.  Point the GDTR and IDTR at the read-only alias.
> 

Well, it is weaker, because if you can discover the pointer to the
writable alias you win.

Now, as has been pointed out the GDT needs to be writable on 32 bits as
a matter of hardware requirement.  However, doing it for 64 bits only is
probably enough of a win.

	-hpa


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