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Date: Sat, 11 May 2013 01:15:42 +0200
From: Lukas Odzioba <lukas.odzioba@...il.com>
To: john-dev@...ts.openwall.com
Subject: Re: AMD GCN ISA development
2013/5/10 Solar Designer <solar@...nwall.com>:
> $ od -tx1 kernels/bf_kernel_Tahiti.bin | fgrep '1d 02 06 7e'
> 3031600 00 00 82 08 04 34 1d 02 06 7e 82 02 08 38 00 00
> 3032060 04 34 1d 02 06 7e 82 08 0a 38 00 00 34 d8 02 03
> 3032600 34 d8 02 03 00 00 82 0a 04 34 1d 02 06 7e 82 08
> [...]
> 3105100 00 00 82 10 04 34 1d 02 06 7e 82 0a 10 38 00 00
> 3105660 00 00 82 10 04 34 1d 02 06 7e 82 0a 10 38 00 00
> 3107040 34 d8 02 03 00 00 82 0a 04 34 1d 02 06 7e 82 08
>
> Curiously, these are not at aligned addresses in the binary kernel file,
> so I could not use "od -tx4", but that's no problem.
I dumped .text from binary(starting at 0xc334e) so we can compare it
to isa if needed. Output size is 202kB so I can't include it as an attachement.
./tx4 kernels/bf_kernel_Tahiti.bin 0xc334e 0x8206e
If someone knows a better way than this Cfrankenstein code please share it.
On first sight compiler unrolled a lot of code and there are
differences between both versions.
Based on existing ISA/BINary code and AMD ISA reference we can work on
(de)compiler.
Lukas
Download attachment "dump-isa" of type "application/octet-stream" (9020 bytes)
View attachment "tx4.c" of type "text/x-csrc" (754 bytes)
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